Cypress AutoStore STK17TA8 User Manual

STK17TA8128k X 8 AutoStore™ nvSRAMwith Real Time ClockCypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600D

STK17TA8Document #: 001-52039 Rev. ** Page 10 of 23Hardware STORE CycleFigure 12. Hardware STORE CycleSoft Sequence CommandsFigure 13. Soft Sequen

STK17TA8Document #: 001-52039 Rev. ** Page 11 of 23MODE SelectionE W G A16-A0Mode I/O Power NotesH X X X Not Selected Output High Z StandbyL H L X R

STK17TA8Document #: 001-52039 Rev. ** Page 12 of 23nvSRAM OperationThe STK17TA8 nvSRAM is made up of two functional compo-nents paired in the same p

STK17TA8Document #: 001-52039 Rev. ** Page 13 of 23atile elements. Once a STORE cycle is initiated, further memoryinputs and outputs are disabled un

STK17TA8Document #: 001-52039 Rev. ** Page 14 of 23Figure 15. Current versus Cycle TimeRTC OperationsReal Time ClockThe clock registers maintain ti

STK17TA8Document #: 001-52039 Rev. ** Page 15 of 23Calibrating The ClockThe RTC is driven by a quartz controlled oscillator with a nominalfrequency

STK17TA8Document #: 001-52039 Rev. ** Page 16 of 23InterruptsThe STK17TA8 has a Flags register, Interrupt Register, andinterrupt logic that can inte

STK17TA8Document #: 001-52039 Rev. ** Page 17 of 23RTC Register* A binary value, not a BCD value.0 - Not implemented, reserved for future use.Defaul

STK17TA8Document #: 001-52039 Rev. ** Page 18 of 23Register Map Detail0x1FFFFReal Time Clock – Years D7 D6 D5 D4 D3 D2 D1 D010s Years YearsContains

STK17TA8Document #: 001-52039 Rev. ** Page 19 of 230x1FFF7Watchdog TimerD7 D6 D5 D4 D3 D2 D1 D0WDS WDW WDTWDS Watchdog Strobe. Setting this bit to 1

STK17TA8Document #: 001-52039 Rev. ** Page 2 of 23PinoutsFigure 1. Pin Diagram - 48-PIn SSOPVSSA14A12A7A6DQ0DQ1VCCDQ2A3A2A1VCAPA13A8A9A11A10DQ7DQ6V

STK17TA8Document #: 001-52039 Rev. ** Page 20 of 230x1FFF2Alarm – SecondsD7 D6 D5 D4 D3 D2 D1 D0M 10s Alarm Seconds Alarm SecondsContains the alarm

STK17TA8Document #: 001-52039 Rev. ** Page 21 of 23Ordering InformationOrdering CodesPacking OptionBlank=TubeTR=Tape and ReelTemperature RangeBlank=

STK17TA8Document #: 001-52039 Rev. ** Page 22 of 23Package DiagramsFigure 17. 48-Pin SSOP (51-85061)51-85061 *C[+] Feedback

Document #: 001-52039 Rev. ** Revised March 02, 2009 Page 23 of 23AutoStore and QuantumTrap are registered trademarks of Cypress Semiconductor Corpor

STK17TA8Document #: 001-52039 Rev. ** Page 3 of 23Absolute Maximum RatingsVoltage on Input Relative to Ground ...–0.1V to 4.1VVoltage o

STK17TA8Document #: 001-52039 Rev. ** Page 4 of 23AC Test ConditionsInput Pulse Levels ...0V to 3VI

STK17TA8Document #: 001-52039 Rev. ** Page 5 of 23RTC DC CharacteristicsFigure 4. RTC Recommended Component ConfigurationSymbol ParameterCommercial

STK17TA8Document #: 001-52039 Rev. ** Page 6 of 23SRAM READ Cycles #1 and #2Figure 5. SRAM READ Cycle #1: Address Controlled[3, 4, 6] Figure 6. SR

STK17TA8Document #: 001-52039 Rev. ** Page 7 of 23SRAM WRITE Cycles #1 and #2Figure 7. SRAM WRITE Cycle #1: W Controlled[7, 8]Figure 8. SRAM WRITE

STK17TA8Document #: 001-52039 Rev. ** Page 8 of 23AutoStore/Power Up RecallFigure 9. AutoStore/Power Up RECALLNotes9. tHRECALL starts from the time

STK17TA8Document #: 001-52039 Rev. ** Page 9 of 23Software-Controlled STORE/RECALL CycleIn the following table, the software controlled STORE and RE