Cypress AutoStore STK17T88 Specifications

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CY14B256K
256 Kbit (32K x 8) nvSRAM with Real Time Clock
Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600
Document Number: 001-06431 Rev. *H Revised February 24, 2009
Features
25 ns, 35 ns, and 45 ns access times
Pin compatible with STK17T88
Data integrity of Cypress nvSRAM combined with full featured
Real Time Clock
Low power, 350 nA RTC current
Capacitor or battery backup for RTC
Watchdog timer
Clock alarm with programmable interrupts
Hands off automatic STORE on power down with only a small
capacitor
STORE to QuantumTrap™ initiated by software, device pin, or
on power down
RECALL to SRAM initiated by software or on power up
Infinite READ, WRITE, and RECALL cycles
High reliability
Endurance to 200K cycles
Data retention: 20 years at 55°C
Single 3V operation with tolerance of +20%, -10%
Commercial and industrial temperature
48-Pin SSOP (ROHS compliant)
Functional Description
The Cypress CY14B256K combines a 256 Kbit nonvolatile static
RAM with a full-featured real time clock in a monolithic integrated
circuit. The embedded nonvolatile elements incorporate
QuantumTrap technology producing the world’s most reliable
nonvolatile memory. The SRAM is read and written an infinite
number of times, while independent, nonvolatile data resides in
the nonvolatile elements.
The real time clock function provides an accurate clock with leap
year tracking and a programmable high accuracy oscillator. The
alarm function is programmable for one time alarms or periodic
seconds, minutes, hours, or days. There is also a programmable
watchdog timer for process control.
STORE/
RECALL
CONTROL
POWER
CONTROL
SOFTWARE
DETECT
STATIC RAM
ARRAY
512 X 512
QuantumTrap
512 X 512
STORE
RECALL
COLUMN IO
COLUMN DEC
ROW DECODER
INPUT BUFFERS
OE
CE
WE
HSB
V
CC
V
CAP
A
13
-
A
0
A
0
A
1
A
2
A
3
A
4
A
10
A
5
A
6
A
7
A
8
A
9
A
12
A
13
A
14
DQ
0
DQ
1
DQ
2
DQ
3
DQ
4
DQ
5
DQ
6
DQ
7
RTC
MUX
A
14
-
A
0
x
1
x
2
INT
V
RTCbat
V
RTCcap
A
11
Logic Block Diagram
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Summary of Contents

Page 1 - CY14B256K

CY14B256K256 Kbit (32K x 8) nvSRAM with Real Time ClockCypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600

Page 2

CY14B256KDocument Number: 001-06431 Rev. *H Page 10 of 28Figure 5. Interrupt Block DiagramFigure 6. RTC Recommended Component ConfigurationWDF - Wa

Page 3

CY14B256KDocument Number: 001-06431 Rev. *H Page 11 of 28Table 3. RTC Register Map[5, 6]RegisterBCD Format Data [5]Function/RangeD7 D6 D5 D4 D3 D2 D

Page 4 - Noise Considerations

CY14B256KDocument Number: 001-06431 Rev. *H Page 12 of 28Table 4. Register Map Detail0x7FFFTime Keeping - YearsD7 D6 D5 D4 D3 D2 D1 D010s Years Year

Page 5 - Low Average Active Power

CY14B256KDocument Number: 001-06431 Rev. *H Page 13 of 280X7FF8Calibration/ControlD7 D6 D5 D4 D3 D2 D1 D0OSCEN 0 CalibrationSignCalibrationOSCEN Osci

Page 6

CY14B256KDocument Number: 001-06431 Rev. *H Page 14 of 280x7FF4Alarm - HoursD7 D6 D5 D4 D3 D2 D1 D0M 10s Alarm Hours Alarm HoursContains the alarm va

Page 7

CY14B256KDocument Number: 001-06431 Rev. *H Page 15 of 28Maximum RatingsExceeding maximum ratings may impair the useful life of thedevice. These user

Page 8 - Watchdog Timer

CY14B256KDocument Number: 001-06431 Rev. *H Page 16 of 28Data Retention and EnduranceParameter Description Min UnitDATARData Retention 20 YearsNVCNon

Page 9

CY14B256KDocument Number: 001-06431 Rev. *H Page 17 of 28AC Switching Characteristics ParameterDescription25 ns 35 ns 45 nsUnitMin Max Min Max Min Ma

Page 10

CY14B256KDocument Number: 001-06431 Rev. *H Page 18 of 28AC Switching Characteristics (continued)ParameterDescription25 ns 35 ns 45 nsUnitMin Max Min

Page 11

CY14B256KDocument Number: 001-06431 Rev. *H Page 19 of 28AutoStore or Power Up RECALLParameter DescriptionCY14B256KUnitMin MaxtHRECALL [17]Power Up R

Page 12

CY14B256KDocument Number: 001-06431 Rev. *H Page 2 of 28Pin ConfigurationsFigure 1. 48-Pin SSOP Pin DefinitionsPin Name Alt IO Type DescriptionA0–A1

Page 13

CY14B256KDocument Number: 001-06431 Rev. *H Page 20 of 28Software Controlled STORE/RECALL Cycles [20, 21]ParameterAlt. ParameterDescription25 ns 35

Page 14

CY14B256KDocument Number: 001-06431 Rev. *H Page 21 of 28Hardware STORE CycleParameterAlt. ParameterDescriptionCY14B256KUnitMin MaxtDELAY [22]Time Al

Page 15

CY14B256KDocument Number: 001-06431 Rev. *H Page 22 of 28RTC CharacteristicsParameter Description Test Conditions Min Max UnitIBAK [25]RTC Backup Cur

Page 16

CY14B256KDocument Number: 001-06431 Rev. *H Page 23 of 28Part Numbering NomenclatureCY 14 B 256 K - SP 25 X C T Option:T-Tape and ReelBlank - Std.Spe

Page 17

CY14B256KDocument Number: 001-06431 Rev. *H Page 24 of 28Ordering InformationAll the below mentioned parts are Pb-free. Contact your local Cypress sa

Page 18

CY14B256KDocument Number: 001-06431 Rev. *H Page 25 of 28Package DiagramsFigure 17. 48-Pin Shrunk Small Outline Package (51-85061)51-85061-*C[+] Fee

Page 19

CY14B256KDocument Number: 001-06431 Rev. *H Page 26 of 28Document History PageDocument Title: CY14B256K 256 Kbit (32K x 8) nvSRAM with Real Time Cloc

Page 20

CY14B256KDocument Number: 001-06431 Rev. *H Page 27 of 28*H 2663934 GVCH/PYRS 02/24/09 Updated Features sectionUpdated pin definition of WE pinUpdate

Page 21

Document Number: 001-06431 Rev. *H Revised February 24, 2009 Page 28 of 28All products and company names mentioned in this document are the trademark

Page 22

CY14B256KDocument Number: 001-06431 Rev. *H Page 3 of 28Device OperationThe CY14B256K nvSRAM consists of two functionalcomponents paired in the same

Page 23

CY14B256KDocument Number: 001-06431 Rev. *H Page 4 of 28tDELAY, multiple SRAM READ operations take place. If a WRITEis in progress when HSB is pulled

Page 24

CY14B256KDocument Number: 001-06431 Rev. *H Page 5 of 28Low Average Active PowerCMOS technology provides the CY14B256K the benefit ofdrawing signific

Page 25

CY14B256KDocument Number: 001-06431 Rev. *H Page 6 of 28Table 1. Mode SelectionCE WE OEA13–A0 Mode IO PowerH X X X Not Selected Output High Z Standb

Page 26

CY14B256KDocument Number: 001-06431 Rev. *H Page 7 of 28Real Time Clock OperationnvTIME OperationThe CY14B256K consists of internal registers that co

Page 27

CY14B256KDocument Number: 001-06431 Rev. *H Page 8 of 28Calibrating the ClockThe RTC is driven by a quartz controlled oscillator with a nominalfreque

Page 28 - PSoC Solutions

CY14B256KDocument Number: 001-06431 Rev. *H Page 9 of 28Power MonitorThe CY14B256K provides a power management scheme withpower fail interrupt capabi

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