Cypress CY14B104M User Manual

PRELIMINARYCY14B104K, CY14B104M4 Mbit (512K x 8/256K x 16) nvSRAM withReal Time ClockCypress Semiconductor Corporation • 198 Champion Court • San Jose

PRELIMINARYCY14B104K, CY14B104MDocument #: 001-07103 Rev. *K Page 10 of 31Table 4. RTC Register Map[8]Register BCD Format Data[9]Function/RangeCY14B1

PRELIMINARYCY14B104K, CY14B104MDocument #: 001-07103 Rev. *K Page 11 of 31Table 5. Register Map DetailRegisterDescriptionCY14B104K CY14B104M0x7FFFF 0

PRELIMINARYCY14B104K, CY14B104MDocument #: 001-07103 Rev. *K Page 12 of 31RegisterDescriptionCY14B104K CY14B104M0x7FFF8 0x3FFF8Calibration/ControlD7 D

PRELIMINARYCY14B104K, CY14B104MDocument #: 001-07103 Rev. *K Page 13 of 31RegisterDescriptionCY14B104K CY14B104M0x7FFF4 0x3FFF4Alarm - HoursD7 D6 D5 D

PRELIMINARYCY14B104K, CY14B104MDocument #: 001-07103 Rev. *K Page 14 of 31Maximum RatingsExceeding maximum ratings may impair the useful life of thede

PRELIMINARYCY14B104K, CY14B104MDocument #: 001-07103 Rev. *K Page 15 of 31AC Test ConditionsInput Pulse Levels ...

PRELIMINARYCY14B104K, CY14B104MDocument #: 001-07103 Rev. *K Page 16 of 31Table 6. RTC Characteristics Parameters Description Test Conditions Min Typ

PRELIMINARYCY14B104K, CY14B104MDocument #: 001-07103 Rev. *K Page 17 of 31AC Switching Characteristics ParametersDescription20 ns 25 ns 45 nsUnitCypre

PRELIMINARYCY14B104K, CY14B104MDocument #: 001-07103 Rev. *K Page 18 of 31Switching WaveformsFigure 8. SRAM Read Cycle 2: CE Controlled[3, 16, 20] Fi

PRELIMINARYCY14B104K, CY14B104MDocument #: 001-07103 Rev. *K Page 19 of 31Switching WaveformsFigure 10. SRAM Write Cycle 2: CE Controlled[3, 19, 20,

PRELIMINARYCY14B104K, CY14B104MDocument #: 001-07103 Rev. *K Page 2 of 31PinoutsFigure 1. Pin Diagram - 44-PIn and 54-Pin TSOP II Table 1. Pin Defin

PRELIMINARYCY14B104K, CY14B104MDocument #: 001-07103 Rev. *K Page 20 of 31AutoStore/Power Up RECALLParameters Description20 ns 25 ns 45 nsUnitMin Max

PRELIMINARYCY14B104K, CY14B104MDocument #: 001-07103 Rev. *K Page 21 of 31Software Controlled STORE and RECALL Cycle In the following table, the softw

PRELIMINARYCY14B104K, CY14B104MDocument #: 001-07103 Rev. *K Page 22 of 31Hardware STORE CycleParameters Description20 ns 25 ns 45 nsUnitMin Max Min M

PRELIMINARYCY14B104K, CY14B104MDocument #: 001-07103 Rev. *K Page 23 of 31Truth Table For SRAM OperationsHSB should remain HIGH for SRAM Operations.Fo

PRELIMINARYCY14B104K, CY14B104MDocument #: 001-07103 Rev. *K Page 24 of 31Part Numbering NomenclatureOption:T - Tape & ReelBlank - Std.Speed:20 -

PRELIMINARYCY14B104K, CY14B104MDocument #: 001-07103 Rev. *K Page 25 of 31Ordering InformationSpeed(ns)Ordering CodePackageDiagramPackage TypeOperatin

PRELIMINARYCY14B104K, CY14B104MDocument #: 001-07103 Rev. *K Page 26 of 31Package Diagrams Figure 17. 44-Pin TSOP II (51-85087)MAXMIN.DIMENSION IN MM

PRELIMINARYCY14B104K, CY14B104MDocument #: 001-07103 Rev. *K Page 27 of 31Figure 18. 54-Pin TSOP II (51-85160)Package Diagrams (continued)51-85160 *

PRELIMINARYCY14B104K, CY14B104MDocument #: 001-07103 Rev. *K Page 28 of 31Document History PageDocument Title: CY14B104K/CY14B104M 4 Mbit (512K x 8/25

PRELIMINARYCY14B104K, CY14B104MDocument #: 001-07103 Rev. *K Page 29 of 31*F 1890926 See ECN vsutmp8/AE-SAAdded Footnote 1, 2 and 3.Updated Logic Bloc

PRELIMINARYCY14B104K, CY14B104MDocument #: 001-07103 Rev. *K Page 3 of 31Device OperationThe CY14B104K/CY14B104M nvSRAM is made up of twofunctional co

PRELIMINARYCY14B104K, CY14B104MDocument #: 001-07103 Rev. *K Page 30 of 31*I 2519319 06/20/08 GVCH/PYRS Added 20 ns access speed in “Features”Added IC

Document #: 001-07103 Rev. *K Revised January 29, 2009 Page 31 of 31AutoStore and QuantumTrap are registered trademarks of Cypress Semiconductor Corpo

PRELIMINARYCY14B104K, CY14B104MDocument #: 001-07103 Rev. *K Page 4 of 31power-on-recall, the MPU must be active or the WE held inactiveuntil the MPU

PRELIMINARYCY14B104K, CY14B104MDocument #: 001-07103 Rev. *K Page 5 of 31Preventing AutoStoreThe AutoStore function is disabled by initiating an AutoS

PRELIMINARYCY14B104K, CY14B104MDocument #: 001-07103 Rev. *K Page 6 of 31Data ProtectionThe CY14B104K/CY14B104M protects data from corruptionduring lo

PRELIMINARYCY14B104K, CY14B104MDocument #: 001-07103 Rev. *K Page 7 of 31must be set to ‘1’. This turns off the oscillator circuit, extendingthe batte

PRELIMINARYCY14B104K, CY14B104MDocument #: 001-07103 Rev. *K Page 8 of 31New time out values are written by setting the watchdog write bitto ‘0’. When

PRELIMINARYCY14B104K, CY14B104MDocument #: 001-07103 Rev. *K Page 9 of 31Figure 4. RTC Recommended Component Configuration Figure 5. Interrupt Block