128K x 8 Static RAMCY7C1019CV33Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600Document #: 38-05130 R
CY7C1019CV33Document #: 38-05130 Rev. *F Page 10 of 10Document History PageDocument Title: CY7C1019CV33 128K x 8 Static RAMDocument Number: 38-05130
CY7C1019CV33Document #: 38-05130 Rev. *F Page 2 of 10Pin Configuration[1]Selection Guide-10 -12 -15 UnitMaximum Access Time 10 12 15 nsMaximum Opera
CY7C1019CV33Document #: 38-05130 Rev. *F Page 3 of 10Maximum Ratings(Above which the useful life may be impaired. For user guide-lines, not tested.)
CY7C1019CV33Document #: 38-05130 Rev. *F Page 4 of 10AC Test Loads and Waveforms[4] Switching Characteristics Over the Operating Range[5] Parameter
CY7C1019CV33Document #: 38-05130 Rev. *F Page 5 of 10 Switching WaveformsRead Cycle No. 1[11, 12]Read Cycle No. 2 (OE Controlled)[12, 13]Write Cycle
CY7C1019CV33Document #: 38-05130 Rev. *F Page 6 of 10 Write Cycle No. 2 (WE Controlled, OE HIGH During Write)[14, 15]Write Cycle No. 3 (WE Controlle
CY7C1019CV33Document #: 38-05130 Rev. *F Page 7 of 10 Ordering InformationSpeed (ns) Ordering CodePackage Diagram Package TypeOperating Range10 CY7C
CY7C1019CV33Document #: 38-05130 Rev. *F Page 8 of 10Package Diagrams (continued)51-85095-**32-pin TSOP II (51-85095)[+] Feedback
CY7C1019CV33Document #: 38-05130 Rev. *F Page 9 of 10© Cypress Semiconductor Corporation, 2006. The information contained herein is subject to chan
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