Cypress enCoRe CY7C604XX User Manual

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enCoRe™ V Low Voltage Microcontroller
CY7C604XX
Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600
Document Number: 001-12395 Rev *H Revised January 30, 2009
Features
Powerful Harvard Architecture Processor
M8C processor speeds running up to 24 MHz
Low power at high processing speeds
Interrupt controller
1.71V to 3.6V operating voltage
Temperature range: 0°C to 70°C
Flexible On-Chip Memory
Up to 32K Flash program storage
50,000 Erase and write cycles
Flexible protection modes
Up to 2048 bytes SRAM data storage
In-System Serial Programming (ISSP)
Complete Development Tools
Free development tool (PSoC Designer™)
Full featured, in-circuit emulator and programmer
Full speed emulation
Complex breakpoint structure
128K trace memory
Precision, Programmable Clocking
Crystal-less oscillator with support for an external crystal or
resonator
Internal ±5.0% 6, 12, or 24 MHz main oscillator
Internal low speed oscillator at 32 kHz for watchdog and
sleep.The frequency range is 19 to 50 kHz with a 32 kHz
typical value
Programmable Pin Configurations
25 mA sink current on all GPIO
Pull Up, High Z, Open Drain, CMOS drive modes on all GPIO
Configurable inputs on all GPIO
Low dropout voltage regulator for Port 1 pins. Programmable
to output 3.0, 2.5, or 1.8V at the I/O pins
Selectable, regulated digital I/O on Port 1
Configurable input threshold for Port 1
3.0V, 20 mA total Port 1 source current
Hot-swappable
5 mA strong drive mode on Ports 0 and 1
Additional System Resources
Configurable communication speeds
I
2
C Slave
Selectable to 50 kHz, 100 kHz, or 400 kHz
Implementation requires no clock stretching
Implementation during sleep modes with less than 100 mA
Hardware address detection
SPI master and SPI slave
Configurable between 93.75 kHz and 12 MHz
Three 16-bit timers
8-bit ADC used to monitor battery voltage or other signals -
with external components
Watchdog and sleep timers
Integrated supervisory circuit
System Bus
6/12/24 MHz Internal Main Oscillator
CPU Core
(M8C)
SROM Flash 32K
SYSTEM RESOURCES
I2C Slave/SPI
Master-Slave
POR and LVD
System Resets
Port 1 Port 0
Sleep and
Watchdog
Port 3 Port 2
Prog. LDO
SRAM
2048 Bytes
Interrupt
Controller
enCoRe V
Low Voltage
CORE
3 16-Bit
Timers
Port 4
enCoRe V LV Block Diagram
[+] Feedback
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Summary of Contents

Page 1 - CY7C604XX

enCoRe™ V Low Voltage MicrocontrollerCY7C604XXCypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600Document

Page 2

CY7C604XXDocument Number: 001-12395 Rev *H Page 10 of 3018 Power Vss Supply ground19 NC NC No connection20 NC NC No connection21 Power Vdd Supply volt

Page 3

CY7C604XXDocument Number: 001-12395 Rev *H Page 11 of 30Register ReferenceThe section discusses the registers of the enCoRe V LV device. It lists all

Page 4

CY7C604XXDocument Number: 001-12395 Rev *H Page 12 of 30 Table 5. Register Map Bank 0 Table: User SpaceName Addr (0,Hex) Access Name Addr (0,Hex) Acc

Page 5

CY7C604XXDocument Number: 001-12395 Rev *H Page 13 of 30 Table 6. Register Map Bank 1 Table: Configuration SpaceName Addr (1,Hex) Access Name Addr (1

Page 6

CY7C604XXDocument Number: 001-12395 Rev *H Page 14 of 30Electrical SpecificationsThis section presents the DC and AC electrical specifications of the

Page 7

CY7C604XXDocument Number: 001-12395 Rev *H Page 15 of 30ADC Electrical SpecificationsTable 8. ADC Electrical SpecificationsSymbol Description Min Typ

Page 8

CY7C604XXDocument Number: 001-12395 Rev *H Page 16 of 30Maximum Ratings Storage Temperature (TSTG) (5)-55oC to 125oC (Typical +25oC)Supply Voltage Rel

Page 9 - 48-Pin Part Pinout

CY7C604XXDocument Number: 001-12395 Rev *H Page 17 of 30DC General Purpose I/O SpecificationsThe following tables list guaranteed maximum and minimum

Page 10

CY7C604XXDocument Number: 001-12395 Rev *H Page 18 of 30Table 11. 2.4V to 3.0V DC GPIO SpecificationsSymbol Description Conditions Min Typ Max Units

Page 11

CY7C604XXDocument Number: 001-12395 Rev *H Page 19 of 30Table 12. 1.71V to 2.4V DC GPIO SpecificationsSymbol Description Conditions Min Typ Max Unit

Page 12 - [+] Feedback

CY7C604XXDocument Number: 001-12395 Rev *H Page 2 of 30Functional OverviewThe enCoRe V LV family of devices are designed to replacemultiple traditiona

Page 13

CY7C604XXDocument Number: 001-12395 Rev *H Page 20 of 30DC POR and LVD SpecificationsTable 13 lists guaranteed maximum and minimum specifications for

Page 14 - Electrical Specifications

CY7C604XXDocument Number: 001-12395 Rev *H Page 21 of 30AC Electrical CharacteristicsAC Chip Level SpecificationsTable 15 lists guaranteed maximum and

Page 15

CY7C604XXDocument Number: 001-12395 Rev *H Page 22 of 30Figure 6. GPIO Timing DiagramAC External Clock SpecificationsTable 17 lists guaranteed maximu

Page 16

CY7C604XXDocument Number: 001-12395 Rev *H Page 23 of 30Figure 7. Timing Diagram - AC Programming CycleAC SPI SpecificationsTable 19 lists guaranteed

Page 17

CY7C604XXDocument Number: 001-12395 Rev *H Page 24 of 30AC I2C SpecificationsTable 20 lists guaranteed maximum and minimum specifications for the enti

Page 18

CY7C604XXDocument Number: 001-12395 Rev *H Page 25 of 30Package DiagramThis section illustrates the packaging specifications for the enCoRe V LV devic

Page 19

CY7C604XXDocument Number: 001-12395 Rev *H Page 26 of 30Figure 10. 32-Pin (5 x 5 x 0.55 mm) QFN (001-42168)001-42168 *C[+] Feedback

Page 20 - DC Programming Specifications

CY7C604XXDocument Number: 001-12395 Rev *H Page 27 of 30Figure 11. 48-Pin (7 x 7 x 0.9 mm) QFN (001-13191) Package HandlingSome IC packages require b

Page 21

CY7C604XXDocument Number: 001-12395 Rev *H Page 28 of 30Thermal Impedances Solder Reflow Peak TemperatureFollowing is the minimum solder reflow peak t

Page 22 - AC Programming Specifications

CY7C604XXDocument Number: 001-12395 Rev *H Page 29 of 30Document History Page Document Title: CY7C604XX, enCoRe™ V Low Voltage MicrocontrollerDocument

Page 23

CY7C604XXDocument Number: 001-12395 Rev *H Page 3 of 30Development ToolsPSoC Designer is a Microsoft® Windows-based, integrateddevelopment environment

Page 24 - C Specifications

Document Number: 001-12395 Rev *H Revised January 30, 2009 Page 30 of 30enCoRe™, PSoC Designer™ and Programmable System-on-Chip™ are trademarks and PS

Page 25

CY7C604XXDocument Number: 001-12395 Rev *H Page 4 of 30Designing with PSoC DesignerThe development process for the enCoRe V device differs fromthat of

Page 26

CY7C604XXDocument Number: 001-12395 Rev *H Page 5 of 30Document ConventionsAcronyms UsedThe following table lists the acronyms that are used in thisdo

Page 27

CY7C604XXDocument Number: 001-12395 Rev *H Page 6 of 30Pin Configuration16-Pin Part Pinout Figure 1. CY7C60413 16-Pin enCoRe V LV Device Table 1. 16-

Page 28

CY7C604XXDocument Number: 001-12395 Rev *H Page 7 of 3032-Pin Part Pinout Figure 2. CY7C60445 32-Pin enCoRe V LV Device Table 2. 32-Pin Part Pinout (

Page 29

CY7C604XXDocument Number: 001-12395 Rev *H Page 8 of 3017 Reset Input XRES Active high external reset with internal pull down18 I/O P3[0] Digital I/O1

Page 30 - PSoC Solutions

CY7C604XXDocument Number: 001-12395 Rev *H Page 9 of 3048-Pin Part Pinout Figure 3. CY7C60455/CY7C60456 48-Pin enCoRe V LV Device Table 3. 48-Pin Par

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