Cypress CY14B101Q1 User Manual

PRELIMINARY1 Mbit (128K x 8) Serial SPI nvSRAMCY14B101Q1CY14B101Q2CY14B101Q3Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 9513

PRELIMINARYCY14B101Q1CY14B101Q2CY14B101Q3Document #: 001-50091 Rev. *A Page 10 of 22Write Protect (WP) Pin The write protect pin (WP) is used to provi

PRELIMINARYCY14B101Q1CY14B101Q2CY14B101Q3Document #: 001-50091 Rev. *A Page 11 of 22nvSRAM Special InstructionsCY14B101Q1/CY14B101Q2/CY14B101Q3 provid

PRELIMINARYCY14B101Q1CY14B101Q2CY14B101Q3Document #: 001-50091 Rev. *A Page 12 of 22bit is cleared on the positive edge of CS following the STOREinstr

PRELIMINARYCY14B101Q1CY14B101Q2CY14B101Q3Document #: 001-50091 Rev. *A Page 13 of 22Maximum RatingsExceeding maximum ratings may shorten the useful li

PRELIMINARYCY14B101Q1CY14B101Q2CY14B101Q3Document #: 001-50091 Rev. *A Page 14 of 22AC Test ConditionsInput Pulse Levels...

PRELIMINARYCY14B101Q1CY14B101Q2CY14B101Q3Document #: 001-50091 Rev. *A Page 15 of 22AC Switching Characteristics CypressParameterAlt.ParameterDescript

PRELIMINARYCY14B101Q1CY14B101Q2CY14B101Q3Document #: 001-50091 Rev. *A Page 16 of 22AutoStore or Power Up RECALLParameters DescriptionCY‘4B101QxAUnitM

PRELIMINARYCY14B101Q1CY14B101Q2CY14B101Q3Document #: 001-50091 Rev. *A Page 17 of 22Software Controlled STORE and RECALL Cycles Parameter DescriptionC

PRELIMINARYCY14B101Q1CY14B101Q2CY14B101Q3Document #: 001-50091 Rev. *A Page 18 of 22 Hardware STORE CycleParameter DescriptionCY14B101Q1UnitMin MaxtD

PRELIMINARYCY14B101Q1CY14B101Q2CY14B101Q3Document #: 001-50091 Rev. *A Page 19 of 22Ordering InformationOrdering CodePackageDiagramPackage TypeOperati

PRELIMINARYCY14B101Q1CY14B101Q2CY14B101Q3Document #: 001-50091 Rev. *A Page 2 of 22PinoutsFigure 1. Pin Diagram - 8-Pin DFN[1, 2, 3]Figure 2. Pin Di

PRELIMINARYCY14B101Q1CY14B101Q2CY14B101Q3Document #: 001-50091 Rev. *A Page 20 of 22Package Diagrams Figure 27. 8-Pin (300 mil) DFN Package (001-506

PRELIMINARYCY14B101Q1CY14B101Q2CY14B101Q3Document #: 001-50091 Rev. *A Page 21 of 22Figure 28. 16-Pin (300 mil) SOIC (51-85022)Package Diagrams (cont

Document #: 001-50091 Rev. *A Revised February 2, 2009 Page 22 of 22AutoStore and QuantumTrap are trademarks of Cypress Semiconductor Corp. All produc

PRELIMINARYCY14B101Q1CY14B101Q2CY14B101Q3Document #: 001-50091 Rev. *A Page 3 of 22Device Operation CY14B101Q1/CY14B101Q2/CY14B101Q3 is 1 Mbit nvSRAMm

PRELIMINARYCY14B101Q1CY14B101Q2CY14B101Q3Document #: 001-50091 Rev. *A Page 4 of 22capacitor (VCAP) and enables the device to safely STORE thedata in

PRELIMINARYCY14B101Q1CY14B101Q2CY14B101Q3Document #: 001-50091 Rev. *A Page 5 of 22Note CY14B101Q2/CY14B101Q3 has AutoStore Enabled fromthe factory. I

PRELIMINARYCY14B101Q1CY14B101Q2CY14B101Q3Document #: 001-50091 Rev. *A Page 6 of 22SPI ModesCY14B101Q1/CY14B101Q2/CY14B101Q3 may be driven by amicroco

PRELIMINARYCY14B101Q1CY14B101Q2CY14B101Q3Document #: 001-50091 Rev. *A Page 7 of 22SPI Operating FeaturesPower UpPower up is defined as the condition

PRELIMINARYCY14B101Q1CY14B101Q2CY14B101Q3Document #: 001-50091 Rev. *A Page 8 of 22Status RegisterThe status register bits are listed in Ta b le 3 . T

PRELIMINARYCY14B101Q1CY14B101Q2CY14B101Q3Document #: 001-50091 Rev. *A Page 9 of 22Write Protection and Block ProtectionCY14B101Q1/CY14B101Q2/CY14B101