Cypress CY7C1338G User Manual

4-Mbit (128K x 32) Flow-Through Sync SRAMCY7C1338GCypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600Docum

CY7C1338GDocument #: 38-05521 Rev. *D Page 10 of 17Switching Characteristics Over the Operating Range[11, 12, 13, 14, 15, 16] Parameter Description–13

CY7C1338GDocument #: 38-05521 Rev. *D Page 11 of 17Timing DiagramsRead Cycle Timing[17]Note: 17. On this diagram, when CE is LOW: CE1 is LOW, CE2 is H

CY7C1338GDocument #: 38-05521 Rev. *D Page 12 of 17Write Cycle Timing[17, 18]Note: 18.Full width write can be initiated by either GW LOW; or by GW HIG

CY7C1338GDocument #: 38-05521 Rev. *D Page 13 of 17Read/Write Timing[17, 19, 20]Notes: 19. The data bus (Q) remains in high-Z following a WRITE cycle,

CY7C1338GDocument #: 38-05521 Rev. *D Page 14 of 17ZZ Mode Timing [21, 22]Notes: 21. Device must be deselected when entering ZZ mode. See Cycle Descri

CY7C1338GDocument #: 38-05521 Rev. *D Page 15 of 17Ordering InformationNot all of the speed, package and temperature ranges are available. Please cont

CY7C1338GDocument #: 38-05521 Rev. *D Page 16 of 17© Cypress Semiconductor Corporation, 2006. The information contained herein is subject to change w

CY7C1338GDocument #: 38-05521 Rev. *D Page 17 of 17Document History PageDocument Title: CY7C1338G 4-Mbit (128K x 32) Flow-Through Sync SRAMDocument Nu

CY7C1338GDocument #: 38-05521 Rev. *D Page 2 of 17Selection Guide133 MHz 100 MHz UnitMaximum Access Time 6.5 8.0 nsMaximum Operating Current 225 205

CY7C1338GDocument #: 38-05521 Rev. *D Page 3 of 17Pin Definitions Name I/O DescriptionA0, A1, A Input-SynchronousAddress Inputs used to select one of

CY7C1338GDocument #: 38-05521 Rev. *D Page 4 of 17Functional OverviewAll synchronous inputs pass through input registers controlledby the rising edge

CY7C1338GDocument #: 38-05521 Rev. *D Page 5 of 17Single Write Accesses Initiated by ADSPThis access is initiated when the following conditions aresat

CY7C1338GDocument #: 38-05521 Rev. *D Page 6 of 17Truth Table[2, 3, 4, 5, 6]Cycle DescriptionAddress Used CE1CE2CE3ZZ ADSP ADSC ADV WRITE OE CLK DQDes

CY7C1338GDocument #: 38-05521 Rev. *D Page 7 of 17Partial Truth Table for Read/Write[2, 7]Function GW BWE BWDBWCBWBBWARead HHXXXXRead HLHHHHWrite Byte

CY7C1338GDocument #: 38-05521 Rev. *D Page 8 of 17Maximum Ratings(Above which the useful life may be impaired. For user guide-lines, not tested.)Stora

CY7C1338GDocument #: 38-05521 Rev. *D Page 9 of 17Capacitance[10]Parameter Description Test Conditions100 TQFPMax.119 BGAMax. UnitCINInput Capacitance