CY62146EV30 MoBL®4-Mbit (256K x 16) Static RAMCypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600Document
CY62146EV30 MoBL®Document #: 38-05567 Rev. *C Page 10 of 12Package DiagramsFigure 1. 48-ball VFBGA (6 x 8 x 1 mm), 51-85150A1A1 CORNER0.750.75Ø0.30±0.
CY62146EV30 MoBL®Document #: 38-05567 Rev. *C Page 11 of 12© Cypress Semiconductor Corporation, 2006-2007. The information contained herein is subject
CY62146EV30 MoBL®Document #: 38-05567 Rev. *C Page 12 of 12Document History PageDocument Title:CY62146EV30 MoBL®, 4-Mbit (256K x 16) Static RAMDocumen
CY62146EV30 MoBL®Document #: 38-05567 Rev. *C Page 2 of 12Logic Block DiagramPin Configurations [3, 4]256K x 16RAM ArrayIO0–IO7ROW DECODER A8A7A6A5A2C
CY62146EV30 MoBL®Document #: 38-05567 Rev. *C Page 3 of 12Maximum RatingsExceeding the maximum ratings may impair the useful life ofthe device. These
CY62146EV30 MoBL®Document #: 38-05567 Rev. *C Page 4 of 12Capacitance (For All Packages) [9]Parameter Description Test Conditions Max UnitCINInput Cap
CY62146EV30 MoBL®Document #: 38-05567 Rev. *C Page 5 of 12Switching Characteristics (Over the Operating Range)[11, 12]Parameter Description45 nsUnitMi
CY62146EV30 MoBL®Document #: 38-05567 Rev. *C Page 6 of 12Switching WaveformsRead Cycle 1 (Address Transition Controlled) [16, 17]Read Cycle No. 2 (OE
CY62146EV30 MoBL®Document #: 38-05567 Rev. *C Page 7 of 12Write Cycle No. 1 (WE Controlled) [15, 19, 20]Write Cycle No. 2 (CE Controlled) [15, 19, 20]
CY62146EV30 MoBL®Document #: 38-05567 Rev. *C Page 8 of 12Write Cycle No. 3 (WE Controlled, OE LOW) [20]Write Cycle No. 4 (BHE/BLE Controlled, OE LOW)
CY62146EV30 MoBL®Document #: 38-05567 Rev. *C Page 9 of 12Truth TableCE WE OE BHE BLE Inputs/Outputs Mode PowerH X X X X High-Z Deselect/Power down St
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