18-Mbit (512K x 36/1M x 18) Flow-Through SRAMCY7C1381DV25, CY7C1381FV25CY7C1383DV25, CY7C1383FV25Cypress Semiconductor Corporation • 198 Champion Cour
CY7C1381DV25, CY7C1381FV25CY7C1383DV25, CY7C1383FV25Document #: 38-05547 Rev. *E Page 10 of 28Truth Table for Read/Write [4, 9]Function (CY7C1381DV25/
CY7C1381DV25, CY7C1381FV25CY7C1383DV25, CY7C1383FV25Document #: 38-05547 Rev. *E Page 11 of 28IEEE 1149.1 Serial Boundary Scan (JTAG)The CY7C1381DV25/
CY7C1381DV25, CY7C1381FV25CY7C1383DV25, CY7C1383FV25Document #: 38-05547 Rev. *E Page 12 of 28When the TAP controller is in the Capture-IR state, the
CY7C1381DV25, CY7C1381FV25CY7C1383DV25, CY7C1383FV25Document #: 38-05547 Rev. *E Page 13 of 28the TAP controller, it will directly control the state o
CY7C1381DV25, CY7C1381FV25CY7C1383DV25, CY7C1383FV25Document #: 38-05547 Rev. *E Page 14 of 282.5V TAP AC Test ConditionsInput pulse levels ...
CY7C1381DV25, CY7C1381FV25CY7C1383DV25, CY7C1383FV25Document #: 38-05547 Rev. *E Page 15 of 28Identification CodesInstruction Code DescriptionEXTEST 0
CY7C1381DV25, CY7C1381FV25CY7C1383DV25, CY7C1383FV25Document #: 38-05547 Rev. *E Page 16 of 28165-Ball BGA Boundary Scan Order[13, 15] Bit # Ball ID B
CY7C1381DV25, CY7C1381FV25CY7C1383DV25, CY7C1383FV25Document #: 38-05547 Rev. *E Page 17 of 28Maximum RatingsExceeding the maximum ratings may impair
CY7C1381DV25, CY7C1381FV25CY7C1383DV25, CY7C1383FV25Document #: 38-05547 Rev. *E Page 18 of 28Capacitance [18]Parameter Description Test Conditions100
CY7C1381DV25, CY7C1381FV25CY7C1383DV25, CY7C1383FV25Document #: 38-05547 Rev. *E Page 19 of 28Switching CharacteristicsOver the Operating Range[19, 20
CY7C1381DV25, CY7C1381FV25CY7C1383DV25, CY7C1383FV25Document #: 38-05547 Rev. *E Page 2 of 28Logic Block Diagram – CY7C1381DV25/CY7C1381FV25 [3] (512K
CY7C1381DV25, CY7C1381FV25CY7C1383DV25, CY7C1383FV25Document #: 38-05547 Rev. *E Page 20 of 28Timing DiagramsRead Cycle Timing [25]tCYCtCLCLKtADHtADSA
CY7C1381DV25, CY7C1381FV25CY7C1383DV25, CY7C1383FV25Document #: 38-05547 Rev. *E Page 21 of 28 Write Cycle Timing [25, 26]Timing Diagrams (continued)t
CY7C1381DV25, CY7C1381FV25CY7C1383DV25, CY7C1383FV25Document #: 38-05547 Rev. *E Page 22 of 28Read/Write Cycle Timing [25, 27, 28]Timing Diagrams (con
CY7C1381DV25, CY7C1381FV25CY7C1383DV25, CY7C1383FV25Document #: 38-05547 Rev. *E Page 23 of 28ZZ Mode Timing [29, 30]Timing Diagrams (continued)tZZISU
CY7C1381DV25, CY7C1381FV25CY7C1383DV25, CY7C1383FV25Document #: 38-05547 Rev. *E Page 24 of 28Ordering InformationNot all of the speed, package, and t
CY7C1381DV25, CY7C1381FV25CY7C1383DV25, CY7C1383FV25Document #: 38-05547 Rev. *E Page 25 of 28Package DiagramsFigure 1. 100-Pin Thin Plastic Quad Flat
CY7C1381DV25, CY7C1381FV25CY7C1383DV25, CY7C1383FV25Document #: 38-05547 Rev. *E Page 26 of 28Figure 2. 119-Ball BGA (14 x 22 x 2.4 mm) (51-85115)Pack
CY7C1381DV25, CY7C1381FV25CY7C1383DV25, CY7C1383FV25Document #: 38-05547 Rev. *E Page 27 of 28© Cypress Semiconductor Corporation, 2006-2007. The info
CY7C1381DV25, CY7C1381FV25CY7C1383DV25, CY7C1383FV25Document #: 38-05547 Rev. *E Page 28 of 28Document History PageDocument Title: CY7C1381DV25/CY7C13
CY7C1381DV25, CY7C1381FV25CY7C1383DV25, CY7C1383FV25Document #: 38-05547 Rev. *E Page 3 of 28Pin ConfigurationsAAAAA1A0NCNCVSSVDDAAAAAAAADQPBDQBDQBVDD
CY7C1381DV25, CY7C1381FV25CY7C1383DV25, CY7C1383FV25Document #: 38-05547 Rev. *E Page 4 of 28Pin Configurations (continued)2345671ABCDEFGHJKLMNPRTUVDD
CY7C1381DV25, CY7C1381FV25CY7C1383DV25, CY7C1383FV25Document #: 38-05547 Rev. *E Page 5 of 28Pin Configurations (continued)165-Ball FBGA Pinout (3 Chi
CY7C1381DV25, CY7C1381FV25CY7C1383DV25, CY7C1383FV25Document #: 38-05547 Rev. *E Page 6 of 28Pin DefinitionsName IO DescriptionA0, A1, A Input-Synchro
CY7C1381DV25, CY7C1381FV25CY7C1383DV25, CY7C1383FV25Document #: 38-05547 Rev. *E Page 7 of 28Functional OverviewAll synchronous inputs pass through in
CY7C1381DV25, CY7C1381FV25CY7C1383DV25, CY7C1383FV25Document #: 38-05547 Rev. *E Page 8 of 28and the IOs must be tri-stated prior to the presentation
CY7C1381DV25, CY7C1381FV25CY7C1383DV25, CY7C1383FV25Document #: 38-05547 Rev. *E Page 9 of 28Truth Table [4, 5, 6, 7, 8]Cycle DescriptionAddress UsedC
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