Cypress STK16C88 User Manual download pdf (Page 11)

STK16C88

Document Number: 001-50595 Rev. ** Page 11 of 14

Software Controlled STORE/RECALL Cycle

The software controlled STORE/RECALL cycle follows.

[11, 12]

Parameter Alt Description

25 ns 45 ns

Unit

Min Max Min Max

AVAV

STORE/RECALL Initiation Cycle Time 25 45 ns

[11]

AVEL

Address Setup Time 0 0 ns

[11]

ELEH

Clock Pulse Width 20 30 ns

HACE

[7, 11]

ELAX

Address Hold Time 20 20 ns

RECALL

RECALL Duration 20 20 μs

Switching Waveforms

Figure 10. CE Controlled Software STORE/RECALL Cycle

[12]

SCE

HACE

STORE

/ t

RECALL

DATA VALID

6#SSERDDA1#SSERDDA

HIGH IMPEDANCE

ADDRESS

DQ (DATA)

Notes

11. The software sequence is clocked on the falling edge of CE

without involving OE (double clocking aborts the sequence).

12. The six consecutive addresses must be read in the order listed in the Mode Selection table. WE

must be HIGH during all six consecutive cycles.

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