Cypress CY14B108M User Manual

PRELIMINARYCY14B108K, CY14B108M8 Mbit (1024K x 8/512K x 16) nvSRAM withReal Time ClockCypress Semiconductor Corporation • 198 Champion Court • San Jos

PRELIMINARYCY14B108K, CY14B108MDocument #: 001-47378 Rev. ** Page 10 of 29Figure 4. RTC Recommended Component Configuration Figure 5. Interrupt Bloc

PRELIMINARYCY14B108K, CY14B108MDocument #: 001-47378 Rev. ** Page 11 of 29Table 4. RTC Register Map[7]Register BCD Format Data[8]Function/RangeCY14B1

PRELIMINARYCY14B108K, CY14B108MDocument #: 001-47378 Rev. ** Page 12 of 29Table 5. Register Map DetailRegisterDescriptionCY14B108K CY14B108M0xFFFFF 0

PRELIMINARYCY14B108K, CY14B108MDocument #: 001-47378 Rev. ** Page 13 of 29RegisterDescriptionCY14B108K CY14B108M0xFFFF8 0x7FFF8Calibration/ControlD7 D

PRELIMINARYCY14B108K, CY14B108MDocument #: 001-47378 Rev. ** Page 14 of 29RegisterDescriptionCY14B108K CY14B108M0xFFFF4 0x7FFF4Alarm - HoursD7 D6 D5 D

PRELIMINARYCY14B108K, CY14B108MDocument #: 001-47378 Rev. ** Page 15 of 29Maximum RatingsExceeding maximum ratings may impair the useful life of thede

PRELIMINARYCY14B108K, CY14B108MDocument #: 001-47378 Rev. ** Page 16 of 29AC Test ConditionsInput Pulse Levels ...

PRELIMINARYCY14B108K, CY14B108MDocument #: 001-47378 Rev. ** Page 17 of 29Table 6. RTC Characteristics Parameters Description Test Conditions Min Typ

PRELIMINARYCY14B108K, CY14B108MDocument #: 001-47378 Rev. ** Page 18 of 29AC Switching Characteristics ParametersDescription20 ns 25 ns 45 nsUnitCypre

PRELIMINARYCY14B108K, CY14B108MDocument #: 001-47378 Rev. ** Page 19 of 29Switching WaveformsFigure 8. SRAM Read Cycle 2: CE Controlled[3, 15, 19] Fi

PRELIMINARYCY14B108K, CY14B108MDocument #: 001-47378 Rev. ** Page 2 of 29PinoutsFigure 1. Pin Diagram: 44-PIn and 54-Pin TSOP II Table 1. Pin Defini

PRELIMINARYCY14B108K, CY14B108MDocument #: 001-47378 Rev. ** Page 20 of 29Switching WaveformsFigure 10. SRAM Write Cycle 2: CE Controlled[3, 18, 19,

PRELIMINARYCY14B108K, CY14B108MDocument #: 001-47378 Rev. ** Page 21 of 29AutoStore/Power Up RECALLParameters Description20 ns 25 ns 45 nsUnitMin Max

PRELIMINARYCY14B108K, CY14B108MDocument #: 001-47378 Rev. ** Page 22 of 29Software Controlled STORE and RECALL Cycle In the following table, the softw

PRELIMINARYCY14B108K, CY14B108MDocument #: 001-47378 Rev. ** Page 23 of 29Hardware STORE CycleParameters Description20 ns 25 ns 45 nsUnitMin Max Min M

PRELIMINARYCY14B108K, CY14B108MDocument #: 001-47378 Rev. ** Page 24 of 29Truth Table For SRAM OperationsHSB should remain HIGH for SRAM Operations.Fo

PRELIMINARYCY14B108K, CY14B108MDocument #: 001-47378 Rev. ** Page 25 of 29Part Numbering NomenclatureOption:T - Tape & ReelBlank - Std.Speed:20 -

PRELIMINARYCY14B108K, CY14B108MDocument #: 001-47378 Rev. ** Page 26 of 29Ordering InformationSpeed(ns)Ordering CodePackageDiagramPackage TypeOperatin

PRELIMINARYCY14B108K, CY14B108MDocument #: 001-47378 Rev. ** Page 27 of 29Package Diagrams Figure 17. 44-Pin TSOP II (51-85087)MAXMIN.DIMENSION IN MM

PRELIMINARYCY14B108K, CY14B108MDocument #: 001-47378 Rev. ** Page 28 of 29Figure 18. 54-Pin TSOP II (51-85160)Package Diagrams (continued)51-85160 *

Document #: 001-47378 Rev. ** Revised April 01, 2009 Page 29 of 29AutoStore and QuantumTrap are registered trademarks of Cypress Semiconductor Corpora

PRELIMINARYCY14B108K, CY14B108MDocument #: 001-47378 Rev. ** Page 3 of 29Device OperationThe CY14B108K/CY14B108M nvSRAM is made up of twofunctional co

PRELIMINARYCY14B108K, CY14B108MDocument #: 001-47378 Rev. ** Page 4 of 29power-on-recall, the MPU must be active or the WE held inactiveuntil the MPU

PRELIMINARYCY14B108K, CY14B108MDocument #: 001-47378 Rev. ** Page 5 of 29Preventing AutoStoreThe AutoStore function is disabled by initiating an AutoS

PRELIMINARYCY14B108K, CY14B108MDocument #: 001-47378 Rev. ** Page 6 of 29Data ProtectionThe CY14B108K/CY14B108M protects data from corruptionduring lo

PRELIMINARYCY14B108K, CY14B108MDocument #: 001-47378 Rev. ** Page 7 of 29Real Time Clock OperationnvTime OperationThe CY14B108K/CY14B108M offers inter

PRELIMINARYCY14B108K, CY14B108MDocument #: 001-47378 Rev. ** Page 8 of 29calibration registers and the OSCEN bit are not affected by the‘oscillator fa

PRELIMINARYCY14B108K, CY14B108MDocument #: 001-47378 Rev. ** Page 9 of 29Figure 3. Watchdog Timer Block Diagram.Power MonitorThe CY14B108K provides a