Cypress EZ-USB HX2LP User Manual

PRELIMINARYEZ-USB HX2LP™Low-Power USB 2.0 Hub Controller FamilyCY7C656xxCypress Semiconductor Corporation • 3901 North First Street • San Jose, CA 951

CY7C656xxPRELIMINARYDocument #: 38-08037 Rev. *D Page 10 of 238.0 Default Descriptors8.1 Device DescriptorThe standard device descriptor for CY7C656x

CY7C656xxPRELIMINARYDocument #: 38-08037 Rev. *D Page 11 of 238.4 Endpoint Descriptor8.5 Interface Descriptor[9,10]8.6 Endpoint Descriptor[9,10]8.7 De

CY7C656xxPRELIMINARYDocument #: 38-08037 Rev. *D Page 12 of 238.8 Hub Descriptor9.0 Configuration OptionsSystems using CY7C656xx that do not have the

CY7C656xxPRELIMINARYDocument #: 38-08037 Rev. *D Page 13 of 239.2 Configured – 0xD2 LoadByte 0: 0xD2Needs to be programmed with 0xD2Byte 1: VID (LSB)L

CY7C656xxPRELIMINARYDocument #: 38-08037 Rev. *D Page 14 of 23Byte 0: 0xD3Needs to be programmed with 0xD3Byte 1: VID (LSB)Least Significant Byte of V

CY7C656xxPRELIMINARYDocument #: 38-08037 Rev. *D Page 15 of 23tems that do not accept this, the IllegalHubDescriptor con-figuration bit may be set to

CY7C656xxPRELIMINARYDocument #: 38-08037 Rev. *D Page 16 of 23Byte 22: ActivePorts[3:0]Bits 3–0 are the ActivePorts[3:0] bits that indicates if thecor

CY7C656xxPRELIMINARYDocument #: 38-08037 Rev. *D Page 17 of 2310.2 Hub Class CommandsSetInterface 00000001B 0x0B Alternate SettingInterface Number0x00

CY7C656xxPRELIMINARYDocument #: 38-08037 Rev. *D Page 18 of 23ClearTTBuffer 00100011B 0x08 Dev_Addr, EP_Num TT_Port 0x0000 NoneResetTT 00100000B 0x09

CY7C656xxPRELIMINARYDocument #: 38-08037 Rev. *D Page 19 of 2311.0 Upstream USB ConnectionThe following is a schematic of the USB upstream connector.

CY7C656xxPRELIMINARYDocument #: 38-08037 Rev. *D Page 2 of 233.0 Block DiagramsFigure 3-1. CY7C65640B Block DiagramRouting LogicHub RepeaterUSB Upstr

CY7C656xxPRELIMINARYDocument #: 38-08037 Rev. *D Page 20 of 2314.0 System Block DiagramVCCD–D+SHELLBUSPOWERGND4.7 nF 250V1 MΩD–D+100 kΩ2.2 µF10VHX2L

CY7C656xxPRELIMINARYDocument #: 38-08037 Rev. *D Page 21 of 2315.0 Electrical Characteristics15.1 Absolute Maximum RatingsStorage Temperature ...

PRELIMINARYCY7C656xxDocument #: 38-08037 Rev. *D Page 22 of 23© Cypress Semiconductor Corporation, 2005. The information contained herein is subject

CY7C656xxPRELIMINARYDocument #: 38-08037 Rev. *D Page 23 of 23Document History PageDocument Title: CY7C656xx EZ-USB HX2LP™ Low-Power USB 2.0 Hub Contr

CY7C656xxPRELIMINARYDocument #: 38-08037 Rev. *D Page 3 of 23Figure 3-2. CY7C65630/CY7C65620 Block Diagram3.0 Block Diagrams (continued)This applies

CY7C656xxPRELIMINARYDocument #: 38-08037 Rev. *D Page 4 of 233.1 USB Serial Interface Engine (SIE)The SIE allows the CY7C656xx to communicate with the

CY7C656xxPRELIMINARYDocument #: 38-08037 Rev. *D Page 5 of 23unpowered state. Once the hubs are configured, the ports arenot driven, and the host may

CY7C656xxPRELIMINARYDocument #: 38-08037 Rev. *D Page 6 of 23The LED control lines can also be modulated with a squarewave for power conservation in s

CY7C656xxPRELIMINARYDocument #: 38-08037 Rev. *D Page 7 of 236.0 Pin ConfigurationNote:2. NC are for CY7C65620 ONLY.Figure 6-1. 56-pin Quad Flat Pack

CY7C656xxPRELIMINARYDocument #: 38-08037 Rev. *D Page 8 of 237.0 Pin Description TableTable 7-1 below displays the pin assignments. Table 7-1. Pin A

CY7C656xxPRELIMINARYDocument #: 38-08037 Rev. *D Page 9 of 23Upstream Port17 17 D– I/O/Z Z Upstream D– Signal.18 18 D+ I/O/Z Z Upstream D+ Signal.Down