Cypress EZ-USB HX2LP User Manual download pdf (Page 8)

CY7C656x

x

PRELIMINARY

Document #: 38-08037 Rev. *D Page 8 of 23

7.0 Pin Description Table

Table 7-1 below displays the pin assignments.

Table 7-1. Pin Assignments

[3]

CY7C65640B /

CY7C65630 Pin

CY7C65620

Pin Name Type Default Description

3 3 VCC Power N/A V

CC

. This signal provides power to the chip.

7 7 VCC Power N/A V

CC

. This signal provides power to the chip.

11 11 VCC Power N/A V

CC

. This signal provides power to the chip.

15 15 VCC Power N/A V

CC

. This signal provides power to the chip.

19 19 VCC Power N/A V

CC

. This signal provides power to the chip.

23 23 VCC Power N/A V

CC

. This signal provides power to the chip.

27 27 VCC Power N/A V

CC

. This signal provides power to the chip.

33 33 VCC Power N/A V

CC

. This signal provides power to the chip.

39 39 VCC Power N/A V

CC

. This signal provides power to the chip.

55 55 VCC Power N/A V

CC

. This signal provides power to the chip.

4 4 GND Power N/A GND. Connect to Ground with as short a path as possible.

8 8 GND Power N/A GND. Connect to Ground with as short a path as possible.

12 12 GND Power N/A GND. Connect to Ground with as short a path as possible.

16 16 GND Power N/A GND. Connect to Ground with as short a path as possible.

20 20 GND Power N/A GND. Connect to Ground with as short a path as possible.

24 24 GND Power N/A GND. Connect to Ground with as short a path as possible.

28 28 GND Power N/A GND. Connect to Ground with as short a path as possible.

34 34 GND Power N/A GND. Connect to Ground with as short a path as possible.

40 40 GND Power N/A GND. Connect to Ground with as short a path as possible.

47 47 GND Power N/A GND. Connect to Ground with as short a path as possible.

50 50 GND Power N/A GND. Connect to Ground with as short a path as possible.

56 56 GND Power N/A GND. Connect to Ground with as short a path as possible.

21 21 XIN Input N/A 24-MHz Crystal IN or External Clock Input.

22 22 XOUT Outpu

t

N/A 24-MHz Crystal OUT.

46 46 RESET# Input N/A Active LOW Reset. This pin resets the entire chip. It is

normally tied to V

CC

through a 100K resistor, and to GND

through a 0.1-µF capacitor. Other than this, no other special

power-up procedure is required.

45 45 SELFPWR Input N/A Indicator for bus/self powered. 0 is bus powered, 1 is self-

powered.

26 26 VBUSPOWER Input N/A VBUS. Connect to the VBUS pin of the upstream connector.

This signal indicates to the hub that it is in a connected state,

and may enable the D+ pull-up resistor to indicate a

connection. (The hub will do so after the external EEPROM is

read, unless it is put into a high-speed mode by the upstream

hub).

SPI Interface

25 25 SPI_CS O O SPI Chip Select. Connect to CS pin of the EEPROM.

48 48 SPI_SCK O O SPI Clock. Connect to EEPROM SCK pin.

49 49 SPI_SD I/O/Z Z SPI Dataline Connect to GND with 15-KΩ

resistor and to the

Data I/O pins of the EEPROM.

Note:

3. Unused port DD+/DD– lines can be left floating. The port power, amber, and green LED pins should be left unconnected, and the overcurrent pin should be

tied HIGH. The overcurrent pin is an input and it should not be left floating.

1 2 3 4 5 6 7 8 9 10 11 12 13 ... 22 23

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