16-Mbit (1M x 16) Static RAMCY62167DV18 MoBL®Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600Document
CY62167DV18 MoBL®Document #: 38-05326 Rev. *C Page 10 of 11© Cypress Semiconductor Corporation, 2002-2007. The information contained herein is subjec
CY62167DV18 MoBL®Document #: 38-05326 Rev. *C Page 11 of 11Document History PageDocument Title: CY62167DV18 MoBL®, 16-Mbit (1M x 16) Static RAMDocume
CY62167DV18 MoBL®Document #: 38-05326 Rev. *C Page 2 of 11Product Portfolio ProductVCC Range (V)Speed (ns)Power DissipationOperating ICC (mA)Standby
CY62167DV18 MoBL®Document #: 38-05326 Rev. *C Page 3 of 11Maximum RatingsExceeding the maximum ratings may impair the useful life ofthe device. These
CY62167DV18 MoBL®Document #: 38-05326 Rev. *C Page 4 of 11Thermal Resistance [7]Parameter Description Test Conditions VFBGA UnitΘJAThermal Resistance
CY62167DV18 MoBL®Document #: 38-05326 Rev. *C Page 5 of 11Switching Characteristics (Over the Operating Range)[10] Parameter Description55 nsUnitMin
CY62167DV18 MoBL®Document #: 38-05326 Rev. *C Page 6 of 11Switching WaveformsRead Cycle 1 (Address Transition Controlled)[14, 15]Read Cycle 2 (OE Con
CY62167DV18 MoBL®Document #: 38-05326 Rev. *C Page 7 of 11Write Cycle 1 (WE Controlled)[13, 17, 18]Write Cycle 2 (CE1 or CE2 Controlled)[13, 17, 18]S
CY62167DV18 MoBL®Document #: 38-05326 Rev. *C Page 8 of 11Write Cycle 3 (WE Controlled, OE LOW)[18]Write Cycle 4 (BHE/BLE Controlled, OE LOW)[18]Swit
CY62167DV18 MoBL®Document #: 38-05326 Rev. *C Page 9 of 11 Truth TableCE1CE2WE OE BHE BLE Inputs/Outputs Mode PowerH X X X X X High Z Deselect/Power
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