Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600Document #: 38-05473 Rev. *E Revised July 17, 2008CY7
CY7C1041DV33Document #: 38-05473 Rev. *E Page 10 of 13 Ordering InformationSpeed(ns) Ordering CodePackageDiagram Package TypeOperatingRange10 CY7C104
CY7C1041DV33Document #: 38-05473 Rev. *E Page 11 of 13 Figure 11. 44-Pin (400-mil) Molded SOJ (51-85082)Figure 12. 44-Pin TSOP II (51-85087)Package
CY7C1041DV33Document #: 38-05473 Rev. *E Page 12 of 13 Document History PageDocument Title: CY7C1041DV33 4 Mbit (256K x 16) Static RAMDocument Number
CY7C1041DV33© Cypress Semiconductor Corporation, 2004-2008. The information contained herein is subject to change without notice. Cypress Semiconducto
CY7C1041DV33Document #: 38-05473 Rev. *E Page 2 of 13 Selection GuideDescription –10 (Industrial) –12 (Automotive)[2]UnitMaximum Access Time 10 12 ns
CY7C1041DV33Document #: 38-05473 Rev. *E Page 3 of 13 Maximum RatingsExceeding maximum ratings may shorten the useful life of thedevice. These user g
CY7C1041DV33Document #: 38-05473 Rev. *E Page 4 of 13 Capacitance[6]Parameter Description Test Conditions Max UnitCINInput Capacitance TA = 25°C, f =
CY7C1041DV33Document #: 38-05473 Rev. *E Page 5 of 13 AC Switching Characteristics Over the Operating Range[8]Parameter Description–10 (Industrial) –
CY7C1041DV33Document #: 38-05473 Rev. *E Page 6 of 13 Data Retention Characteristics Over the Operating RangeParameter Description Conditions[14]Min
CY7C1041DV33Document #: 38-05473 Rev. *E Page 7 of 13 Figure 5. Read Cycle No. 2 (OE Controlled)[17, 18]Figure 6. Write Cycle No. 1 (CE Controlled)
CY7C1041DV33Document #: 38-05473 Rev. *E Page 8 of 13 Figure 7. Write Cycle No. 2 (BLE or BHE Controlled)Figure 8. Write Cycle No. 3 (WE Controlled
CY7C1041DV33Document #: 38-05473 Rev. *E Page 9 of 13 Figure 9. Write Cycle No. 4 (WE Controlled, OE LOW)Truth TableCE OE WE BLE BHEIO0–IO7IO8–IO15M
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