1-Mbit (128K x 8) Static RAMCY62128BMoBL®Cypress Semiconductor Corporation • 3901 North First Street • San Jose, CA 95134 • 408-943-2600Document #: 3
CY62128BMoBL®Document #: 38-05300 Rev. *C Page 10 of 11© Cypress Semiconductor Corporation, 2005. The information contained herein is subject to ch
CY62128BMoBL®Document #: 38-05300 Rev. *C Page 11 of 11Document History PageDocument Title: CY62128B MoBL® 1-Mbit (128K x 8) Static RAMDocument Numb
CY62128BMoBL®Document #: 38-05300 Rev. *C Page 2 of 11Pin ConfigurationsProduct PortfolioProductVCC Range (V)Speed (ns)Power Dissipation Operating,
CY62128BMoBL®Document #: 38-05300 Rev. *C Page 3 of 11Maximum Ratings(Above which the useful life may be impaired. For user guide-lines, not tested.
CY62128BMoBL®Document #: 38-05300 Rev. *C Page 4 of 11Thermal Resistance[6]Parameter Description Test Conditions 32 SOIC 32 TSOP 32 STSOP 32 RTSOP U
CY62128BMoBL®Document #: 38-05300 Rev. *C Page 5 of 11Switching Characteristics[7] Over the Operating RangeParameter Description62128B-55 62128B-70U
CY62128BMoBL®Document #: 38-05300 Rev. *C Page 6 of 11Read Cycle No. 2 (OE Controlled)[13, 14]Write Cycle No. 1 (CE1 or CE2 Controlled)[15, 16]Notes
CY62128BMoBL®Document #: 38-05300 Rev. *C Page 7 of 11Write Cycle No. 2 (WE Controlled, OE HIGH During Write)[15, 16]Write Cycle No.3 (WE Controlled
CY62128BMoBL®Document #: 38-05300 Rev. *C Page 8 of 11Truth TableCE1CE2OE WE I/O0–I/O7Mode PowerH X X X High Z Power-down Standby (ISB)X L X X High
CY62128BMoBL®Document #: 38-05300 Rev. *C Page 9 of 11 Package Diagrams0.546[13.868]0.440[11.176]0.101[2.565]0.050[1.270]0.014[0.355]0.118[2.997]0.0
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