Cypress ISR 37000 CPLD User Manual download pdf (Page 10)

Ultra37000 CPLD Family

Document #: 38-03007 Rev. *E Page 10 of 64

Logic Block Diagrams (continued)

TDI

TCK

TMS

TDO

JTAG Tap

Controller

CY37128/CY37128V

PIM

INPUT

MACROCELL

CLOCK

INPUTS

4 4

36

16

16

36

LOGIC

BLOCK

36

16

16

36

16 I/Os

36 36

36

16

16

36

16

16

64

64

41

INPUT/CLOCK

MACROCELLS

I/O

0

–I/O

15

A

INPUTS

LOGIC

BLOCK

C

LOGIC

BLOCK

B

LOGIC

BLOCK

D

LOGIC

BLOCK

H

LOGIC

BLOCK

G

LOGIC

BLOCK

F

LOGIC

BLOCK

E

I/O

16

–I/O

31

I/O

32

–I/O

47

I/O

28

–I/O

63

I/O

112

–I/O

127

I/O

96

–I/O

111

I/O

80

–I/O

95

I/O

64

–I/O

79

16 I/Os

16 I/Os

16 I/Os

16 I/Os

16 I/Os

16 I/Os

16 I/Os

JTAG

EN

LOGIC

BLOCK

H

LOGIC

BLOCK

L

LOGIC

BLOCK

I

LOGIC

BLOCK

J

LOGIC

BLOCK

K

LOGIC

BLOCK

A

LOGIC

BLOCK

B

LOGIC

BLOCK

C

LOGIC

BLOCK

D

LOGIC

BLOCK

E

LOGIC

BLOCK

G

LOGIC

BLOCK

F

36

16

36

16

36

16

36

16

36

16

36

16

36

16

36

16

36

16

36

16

36

16

36

16

PIM

Input

Clock/

Input

10 I/Os

10 I/Os

10 I/Os

10 I/Os

10 I/Os

10 I/Os

10 I/Os

10 I/Os

10 I/Os

10 I/Os

10 I/Os

10 I/Os

I/O

0

–I/O

9

I/O

10

–I/O

19

I/O

20

–I/O

29

I/O

30

–I/O

39

I/O

40

–I/O

49

I/O

50

–I/O

59

I/O

110

–I/O

119

I/O

100

–I/O

109

I/O

90

–I/O

99

I/O

80

–I/O

89

I/O

70

–I/O

79

I/O

60

–I/O

69

4

4

4

6060

TDI

TCK

TMS

TDO

JTAG Tap

Controller

1

CY37192/CY37192V

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