Cypress ISR 37000 CPLD User Manual download pdf (Page 25)

Ultra37000 CPLD Family

Document #: 38-03007 Rev. *E Page 25 of 64

CY37128

CY37192

Typical 5.0V Power Consumption (continued)

0

20

40

60

80

100

120

140

160

0 20 40 60 80 100 120 140 160 180

Frequency (MHz)

Icc (mA)

Low Power

High Speed

The typical pattern is a 16-bit up counter, per logic block, with outputs disabled.

V

CC

= 5.0V, T

A

= Room Temperature

0

50

100

150

200

250

300

0 20 40 60 80 100 120 140 160 180

Frequency (MHz)

Icc (mA)

Low Power

High Speed

The typical pattern is a 16-bit up counter, per logic block, with outputs disabled.

V

CC

= 5.0V, T

A

= Room Temperature

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